<?xml version="1.0" encoding="UTF-8"?>
<!-- generator="wordpress/2.3.3" -->
<rss version="2.0"
	xmlns:content="http://purl.org/rss/1.0/modules/content/"
	xmlns:wfw="http://wellformedweb.org/CommentAPI/"
	xmlns:dc="http://purl.org/dc/elements/1.1/"
	>

<channel>
	<title>ViASIC</title>
	<link>http://viasic.com</link>
	<description>Standard Metal Solutions for Structured ASICs and Configurable SOCs</description>
	<pubDate>Thu, 13 Mar 2008 12:59:37 +0000</pubDate>
	<generator>http://wordpress.org/?v=2.3.3</generator>
	<language>en</language>
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		<title>ViASIC Names J. Mark Goode as President and Chief Executive Officer</title>
		<link>http://viasic.com/2008/03/03/viasic-names-j-mark-goode-as-president-and-chief-executive-officer/</link>
		<comments>http://viasic.com/2008/03/03/viasic-names-j-mark-goode-as-president-and-chief-executive-officer/#comments</comments>
		<pubDate>Mon, 03 Mar 2008 11:00:31 +0000</pubDate>
		<dc:creator>Webmaster</dc:creator>
		
		<category><![CDATA[Press Releases]]></category>

		<guid isPermaLink="false">http://viasic.com/2008/03/03/viasic-names-j-mark-goode-as-president-and-chief-executive-officer/</guid>
		<description><![CDATA[RESEARCH TRIANGLE PARK, N.C. - Mar. 3, 2008 - ViASIC Inc., an electronic design automation (EDA) company that offers breakthrough tools, IP and services for reconfigurable semiconductor fabrics, today announced the promotion of J. Mark Goode to president and chief executive officer, effective immediately.  Goode brings 17 years of solid experience to this role, spanning [...]]]></description>
			<content:encoded><![CDATA[<p><strong>RESEARCH TRIANGLE PARK, N.C. - Mar. 3, 2008 - </strong>ViASIC Inc., an electronic design automation (EDA) company that offers breakthrough tools, IP and services for reconfigurable semiconductor fabrics, today announced the promotion of J. Mark Goode to president and chief executive officer, effective immediately.  Goode brings 17 years of solid experience to this role, spanning strategic marketing, business development and corporate management. He previously served as vice president of business development at ViASIC, and continues to serve on the board of directors.</p>
<p>Lynn Hayden, chairman of the board, and formerly president and chief executive officer at ViASIC said, &#8220;With his broad skills and keen business acumen, Mark Goode is the ideal person to guide ViASIC through its business development and next phase of growth. ViASIC continues to add value for its customers in the radiation hardened market with its configurable technology and will apply this capability more broadly for commercial applications.&#8221;</p>
<p>Goode has held board positions in seven companies and non-profit organizations. Prior to ViASIC, he was director of the Oak   Ridge Design Center for Flextronics, and director of the FORGE Team, a high-end, customer-solutions-oriented ASIC task force. He co-founded ASIC International, Inc. (Ai) in 1993, and served as vice president of engineering before the company was sold to Flextronics in May 2001. An entrepreneur, Goode also has founded and assisted multiple successful companies and organizations. He holds a bachelor&#8217;s degree in music from University of Miami, a masters degree in computer science from New Jersey Institute of Technology, and a masters degree in business administration from the Wharton School at the University of Pennsylvania.</p>
<p>Speaking about his new roles, Goode said, &#8220;ViASIC is in a unique position to help leading-edge companies reduce non-recurring engineering and development costs by up to 95 percent, and significantly improve their time to market. I am honored to be part of the team that made this possible. ViASIC is committed to serving its customers worldwide, and I look forward to leading this effort.&#8221;</p>
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		<title>ViASIC Names Lynn Hayden President and CEO</title>
		<link>http://viasic.com/2007/09/19/viasic-names-lynn-hayden-president-and-ceo/</link>
		<comments>http://viasic.com/2007/09/19/viasic-names-lynn-hayden-president-and-ceo/#comments</comments>
		<pubDate>Wed, 19 Sep 2007 12:00:48 +0000</pubDate>
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		<category><![CDATA[Press Releases]]></category>

		<guid isPermaLink="false">http://viasic.wenderhost.com/2007/09/19/viasic-names-lynn-hayden-president-and-ceo/</guid>
		<description><![CDATA[RESEARCH TRIANGLE PARK, N.C. - Sept. 13, 2007 - ViASIC Inc.,      an electronic design automation (EDA) company that offers breakthrough tools,      IP and services for reconfigurable semiconductor fabrics, today announced      the appointment of Lynn Hayden as president and chief executive [...]]]></description>
			<content:encoded><![CDATA[<p><strong>RESEARCH TRIANGLE PARK, N.C. - Sept. 13, 2007 -</strong> ViASIC Inc.,      an electronic design automation (EDA) company that offers breakthrough tools,      IP and services for reconfigurable semiconductor fabrics, today announced      the appointment of Lynn Hayden as president and chief executive officer (CEO).      Hayden is responsible for leading the company and its business growth worldwide,      and continues to serve as chairman of ViASIC&#8217;s board of directors, a position      he has held since January 2006; he joined the board in September 2003. Hayden      brings to this executive position more than 20 years of visionary market insight      and a demonstrated track record in expanding technology businesses. ViASIC      is the first EDA company to offer semiconductor fabrics that are reconfigurable      - both with and without static random access memory (SRAM) - with only one      or two layers of metal. Compared to standard ASIC approaches, this simplicity,      and the technology&#8217;s inherent capability to allow manufacturing to begin before      the design is fully completed and silicon to be debugged much earlier in the      design flow enables companies to slash mask costs up to 95 percent and significantly      speed time to market.</p>
<p>&#8220;I am honored to serve as president and CEO, and deeply committed to help      leading-edge customers achieve their time-to-market goals,&#8221; said Hayden. &#8220;ViASIC&#8217;s      unparalleled combination of low mask charges, ease of use, high density, risk      mitigation and reconfigurability offers the best overall balance for general      production. Also, our ability to reconfigure a design in less than a month      uniquely positions ViASIC to help companies reduce mask costs and increase      productivity so they can get to market sooner.&#8221;</p>
<p>Prior to ViASIC, Hayden served for 20 years as president and CEO of Coiltronics,      a company he founded in 1977 shortly after his student days at Central Michigan      University and sold to a large multinational corporation in 1997. Under his      direction, it grew from a small regional supplier of relay coils to an international      manufacturer and supplier of high-frequency electromagnetic components, becoming      the largest supplier of its kind in the U.S.</p>
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		<title>Deep Chip Article on ViASIC&#8217;s ViaPath and ViaMask</title>
		<link>http://viasic.com/2007/06/23/deep-chip-article-on-viasics-viapath-and-viamask/</link>
		<comments>http://viasic.com/2007/06/23/deep-chip-article-on-viasics-viapath-and-viamask/#comments</comments>
		<pubDate>Sat, 23 Jun 2007 13:00:27 +0000</pubDate>
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		<category><![CDATA[Asides]]></category>

		<guid isPermaLink="false">http://viasic.wenderhost.com/2007/06/23/deep-chip-article-on-viasics-viapath-and-viamask/</guid>
		<description><![CDATA[Subject:                            ViASIC ViaPath/ViaMask Deep Chip
]]></description>
			<content:encoded><![CDATA[<p><a href="http://www.deepchip.com/items/else06-12.html" target="_blank">Subject:                            ViASIC ViaPath/ViaMask</a> Deep Chip</p>
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		<title>Structured ASICs Not Dead Yet</title>
		<link>http://viasic.com/2006/09/26/structured-asics-not-dead-yet/</link>
		<comments>http://viasic.com/2006/09/26/structured-asics-not-dead-yet/#comments</comments>
		<pubDate>Tue, 26 Sep 2006 13:15:20 +0000</pubDate>
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		<category><![CDATA[Asides]]></category>

		<guid isPermaLink="false">http://viasic.wenderhost.com/2006/09/26/structured-asics-not-dead-yet/</guid>
		<description><![CDATA[Structured                            ASICs are &#8220;not dead yet&#8221; Cooley&#8217;s Wiretap
]]></description>
			<content:encoded><![CDATA[<p><a href="http://www.deepchip.com/wiretap/060928.html" target="_blank">Structured                            ASICs are &#8220;not dead yet&#8221;</a> Cooley&#8217;s Wiretap</p>
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		<title>DAC Preview</title>
		<link>http://viasic.com/2006/07/11/dac-preview/</link>
		<comments>http://viasic.com/2006/07/11/dac-preview/#comments</comments>
		<pubDate>Tue, 11 Jul 2006 13:00:16 +0000</pubDate>
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		<category><![CDATA[Asides]]></category>

		<guid isPermaLink="false">http://viasic.wenderhost.com/2006/07/11/dac-preview/</guid>
		<description><![CDATA[DAC                            Preview: Physical Design and Analysis Electronic                      [...]]]></description>
			<content:encoded><![CDATA[<p><a href="http://www.elecdesign.com/Articles/Index.cfm?AD=1&amp;ArticleID=13038" target="_blank">DAC                            Preview: Physical Design and Analysis</a> Electronic                            Design</p>
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		<title>Configurable SoCs Speed Turnaround</title>
		<link>http://viasic.com/2006/07/03/configurable-socs-speed-turnaround/</link>
		<comments>http://viasic.com/2006/07/03/configurable-socs-speed-turnaround/#comments</comments>
		<pubDate>Mon, 03 Jul 2006 13:00:56 +0000</pubDate>
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		<category><![CDATA[Asides]]></category>

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		<description><![CDATA[Configurable                            SoCs speed turnaround EE Times
]]></description>
			<content:encoded><![CDATA[<p><a href="http://www.eetimes.com/news/latest/showArticle.jhtml?articleID=189602483" target="_blank">Configurable                            SoCs speed turnaround</a> EE Times</p>
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		<title>ViASIC Introduces Industry’s First Two-Mask Standard Metal Fabric for Re-configurable SOC Design</title>
		<link>http://viasic.com/2006/06/30/viasic-introduces-industry%e2%80%99s-first-two-mask-standard-metal-fabric-for-re-configurable-soc-design/</link>
		<comments>http://viasic.com/2006/06/30/viasic-introduces-industry%e2%80%99s-first-two-mask-standard-metal-fabric-for-re-configurable-soc-design/#comments</comments>
		<pubDate>Fri, 30 Jun 2006 12:00:52 +0000</pubDate>
		<dc:creator>Webmaster</dc:creator>
		
		<category><![CDATA[Press Releases]]></category>

		<guid isPermaLink="false">http://viasic.wenderhost.com/2006/06/30/viasic-introduces-industry%e2%80%99s-first-two-mask-standard-metal-fabric-for-re-configurable-soc-design/</guid>
		<description><![CDATA[Research          Triangle Park, NC - June 30, 2006 - ViASIC, Inc., the leading provider          of standard-metal technologies, today announced DuoMask, a high-density,          high performance two-layer standard-metal fabric for [...]]]></description>
			<content:encoded><![CDATA[<p><strong>Research          Triangle Park, NC - June 30, 2006</strong> - ViASIC, Inc., the leading provider          of standard-metal technologies, today announced DuoMask, a high-density,          high performance two-layer standard-metal fabric for building configurable          SOC&#8217;s. With DuoMask, designers can easily and quickly use configurable          logic to add or change SOC features, fix even minor bugs, and design different          versions of the same system for different markets.</p>
<p>For seven metal processes DuoMask          uses via layers 2 and 4 to program the pre-built and pre-characterized          logic and routing. The configurable logic is built upon existing technologies          providing an accurate, proven fabric almost immediately for any process.          The new configurable logic libraries require no logic cell layout, timing          or power characterization; instead they rely on dependable, proven existing          libraries. DuoMask is the densest standard-metal fabric available with          150K gates per mm2 at 90nm.</p>
<p>&#8220;DuoMask provides affordable          two mask customization for every digital process&#8221;, said Bill Cox,          CTO, ViASIC. &#8220;We are excited to provide this new technology which          supports virtually anyone, in any process, at any fab and best of all          it relies on existing proven and characterized libraries&#8221;</p>
<p>Configurable fabrics are one          method that SoC designers can leverage their IP with low-cost, low-risk          respins that empower customization of existing designs and rapid, easy          addition of new features, expanding available markets for this IP. Configurable          SoC&#8217;s use standard-cell flows to build the majority of the chip.          Implementing the proven, stable blocks with classic methodologies, only          a portion of the chip is built with a configurable fabric. This configurable          portion of the SoC can then be used to implement a variety of functions          that could be subject to change. With SoC configurability, designers can          now get initial versions of a product out before final specs are set,          getting hot products to market first.</p>
<p>DuoMask, along with ViASIC&#8217;s          one-mask library ViaMask, and ViaPath, a place and route tool for standard-metal          will be demonstrated at the Design Automation Conference in San Francisco          on July 24 at booth 1108. To set up a private suite appointment email          <a href="mailto:dac@viasic.com">dac@viasic.com</a>. For more information          on the conference visit <a href="http://viasic.com/News/www.dac.com">www.dac.com</a>.</p>
<p><strong>Price and Availability</strong><br />
DuoMask is immediately available for all digital processes between .35          micron and .45 nanometers. U.S. pricing starts at $95,000.</p>
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		<title>Firm Offers Two-Mask Standard Metal Fabric for Re-Configurable SoCs</title>
		<link>http://viasic.com/2006/06/30/firm-offers-two-mask-standard-metal-fabric-for-re-configurable-socs/</link>
		<comments>http://viasic.com/2006/06/30/firm-offers-two-mask-standard-metal-fabric-for-re-configurable-socs/#comments</comments>
		<pubDate>Fri, 30 Jun 2006 11:45:07 +0000</pubDate>
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		<description><![CDATA[Firm                            offers two-mask standard metal fabric for re-configurable                     [...]]]></description>
			<content:encoded><![CDATA[<p><a href="http://www.eet.com/news/design/showArticle.jhtml?articleID=189800158" target="_blank">Firm                            offers two-mask standard metal fabric for re-configurable                            SoCs</a> EE Times</p>
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		<title>SOC Central Article on Stuctured ASICs and Platform FPGAs</title>
		<link>http://viasic.com/2006/06/16/soc-central-article-on-stuctured-asics-and-platform-fpgas/</link>
		<comments>http://viasic.com/2006/06/16/soc-central-article-on-stuctured-asics-and-platform-fpgas/#comments</comments>
		<pubDate>Fri, 16 Jun 2006 21:54:27 +0000</pubDate>
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		<description><![CDATA[Structured                            ASICs and Platform FPGAs: Part 2 SOC Central
]]></description>
			<content:encoded><![CDATA[<p><a href="http://www.soccentral.com/results.asp?CategoryID=488&amp;EntryID=19401" target="_blank">Structured                            ASICs and Platform FPGAs: Part 2</a> SOC Central</p>
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		<title>Structured ASICs and RapidChip</title>
		<link>http://viasic.com/2006/06/09/structured-asics-and-rapidchip/</link>
		<comments>http://viasic.com/2006/06/09/structured-asics-and-rapidchip/#comments</comments>
		<pubDate>Fri, 09 Jun 2006 21:55:32 +0000</pubDate>
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		<description><![CDATA[What We Learned About Structured ASICs from RapidChip                            SOC Central
]]></description>
			<content:encoded><![CDATA[<p><a href="http://www.soccentral.com/results.asp?CategoryID=488&amp;EntryID=19300" target="_blank">What We Learned About Structured ASICs from RapidChip</a>                            SOC Central</p>
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	</channel>
</rss>
