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ViASIC’s Place and Route Technology Chosen by Achronix Semiconductor

RESEARCH TRIANGLE PARK, N.C. – Oct. 7, 2008 – ViASIC Inc., an electronic design automation (EDA) company with breakthrough tools, IP and services for reconfigurable semiconductor fabrics, today announced that Achronix Semiconductor Corp. selected ViASIC’s ViaPath™ place and route software for use in its Achronix CAD environment (ACE).  ViASIC believes ViaPath is the only commercially [...]

ViASIC Names J. Mark Goode as President and Chief Executive Officer

RESEARCH TRIANGLE PARK, N.C. – Mar. 3, 2008 – ViASIC Inc., an electronic design automation (EDA) company that offers breakthrough tools, IP and services for reconfigurable semiconductor fabrics, today announced the promotion of J. Mark Goode to president and chief executive officer, effective immediately.  Goode brings 17 years of solid experience to this role, spanning [...]

ViASIC Names Lynn Hayden President and CEO

RESEARCH TRIANGLE PARK, N.C. – Sept. 13, 2007 – ViASIC Inc., an electronic design automation (EDA) company that offers breakthrough tools, IP and services for reconfigurable semiconductor fabrics, today announced the appointment of Lynn Hayden as president and chief executive officer (CEO). Hayden is responsible for leading the company and its business growth worldwide, and [...]

Deep Chip Article on ViASIC’s ViaPath and ViaMask

Subject: ViASIC ViaPath/ViaMask Deep Chip

Structured ASICs Not Dead Yet

Structured ASICs are “not dead yet” Cooley’s Wiretap

DAC Preview

DAC Preview: Physical Design and Analysis Electronic Design

Configurable SoCs Speed Turnaround

Configurable SoCs speed turnaround EE Times

ViASIC Introduces Industry’s First Two-Mask Standard Metal Fabric for Re-configurable SOC Design

Research Triangle Park, NC – June 30, 2006 – ViASIC, Inc., the leading provider of standard-metal technologies, today announced DuoMask, a high-density, high performance two-layer standard-metal fabric for building configurable SOC’s. With DuoMask, designers can easily and quickly use configurable logic to add or change SOC features, fix even minor bugs, and design different versions [...]

Firm Offers Two-Mask Standard Metal Fabric for Re-Configurable SoCs

Firm offers two-mask standard metal fabric for re-configurable SoCs EE Times

SOC Central Article on Stuctured ASICs and Platform FPGAs

Structured ASICs and Platform FPGAs: Part 2 SOC Central

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